What will processors look like in 2020?
Gene Frantz asks this question at embedded.com:
I have challenged several of our senior technologists to think about what the state of the art will be in the year 2020. You might say that we need to have 20/20 vision for the year 2020. I have invited a number of technologists to provide their point of view (POV) of what the state of the art in IC technology will be in the year 2020, and I’m interested to hear what you have to say on the topic. But, since this is my blog, I will have the first and last word on what the year 2020 will hold for us.
My guess, which most people will probably agree with, is that 1) clock rate will not be much different from today, 2) the memory architecture (levels of cache, RAM, disk…) will still have orders of magnitude differences in access time, and 3) we are going to see parallelisation – and multiple cores – in a big way.
This means that the (computer science) theoretical RAM model is going to be increasingly bad at modeling real computers. Access time is not constant and execution is not sequential.
The PRAM model will probably be pretty good at dealing with multiple cores (where it isn’t really that good for modeling distributed computing).
I’m not sure which models there are for dealing with memory hierarchies. I know there are some, but there were no classes on this when I studied, and I haven’t kept up with this… I know there are cache-oblivious algorithms – I have friends at the CS department who works on this – but I don’t really know much about it. I should probably start worrying about it before 2020…
–
209-206=+3